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1 features programmable gain, network balance and impedance transformerless 2-4wire conversion constant current with constant voltage fallback for long loop capability pin compatible with mh88632 and mh88628. unbalance detection (tip, ring ground sensing) auto ring trip on-hook transmission (ani) capability compatible with requirements of ccitt, doc/ fcc and csa/uls excellent power dissipation (sil vertical mounting) 12/16khz meter pulse injection control solid state tip/ring reversals applications on/off premise pbx line cards did (direct inward dial) line cards central of?e line cards description the zarlink MH88625 slic provides all of the functions required to interface 2-wire off premise subscriber loops to a serial tdm, pcm, switching network of a modern pbx. the MH88625 is manufactured using thick-?m hybrid technology which offers high voltage capability, reliability and high density resulting in signi?ant printed circuit board area savings. a complete line card can be implemented with very few external components. figure 1 - functional block diagram shk ns n2 natt rrd revc z900 z600 z1 z2 grx1 grx0 rx gtx1 gtx0 tx ud tf2 tf1 tip rf2 rf1 ring n1 lca vdd rngc rgnd vrly vee agnd matched feed resistors unbalance detection ring relay driver driver circuitry and speech circuit tip/ring external signal input loop current set switch-hook threshold switch-hook detect impedance network ring filter 2-4 wire conversion gain adjust vba t lgnd reversal esi ese ordering information MH88625 40 pin sil package 0 c to 70 c MH88625 did/ops slic ds5167 issue 7 august 1999 preliminary information
MH88625 preliminary information 2 figure 2 - pin connections pin description pin # name description 1 tip tip lead. connects to the ?ip lead of subscriber line. 2 ring ring lead . connects to the "ring" lead of the subscriber line. 3 tf1 tip feed 1. access point for balanced ringing. normally connects to tf2. 4 tf2 tip feed 2. access point for balanced ringing. normally connects to tf1. 5 rf1 ring feed 1. access point for balanced ringing. normally connects to rf2. 6 rf2 ring feed 2. access point for balanced ringing. normally connects to rf1. 7 lgnd battery ground . v bat return path. connected to systems energy dumping ground. 8 lca current limit set (input). the current limit is set by connecting an external resistor to ground. for 30ma default current, this pin is tied to gnd 9 vbat battery voltage . typically -48vdc is applied to this pin. 10 ic internal connection . this pin is internally connected and must be left open. 11 rgnd relay driver ground connection. 12 vrly relay supply voltage connection . 13 rrd ring relay drive (output). connects to ring relay coil. 14 rngc ring relay control (input). a logic low enables the ring relay drive (rrd ) output which activates the ring relay. the internal auto ring trip circuitry de-activates the relay drive output upon detection of switch-hook. 15 revc reversal control (input). a logic high reverse the internal tip and ring connections. 16 esi external signal input. 12/16khz meter pulse input. 17 ese external signal enable. 12/16khz meter pulse enable. 18 agnd analog ground. v dd and v ee return path. 19 natt network balance at+t node. connects to n1 for a network balance impedance of at&t compromise (350 ? + 1k ? // 210nf); the devices input impedance must be set to 600 ? . this node is active only when ns is at logic high. this node should be left open circuit when not used. 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 n2 z900 z1 z2 tx rx gtxo gtx1 grxo grx1 ic z600 ns shk ud ic ic ic vee vdd 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 tip ring tf1 tf2 rf1 rf2 lgnd lca vbat ic rgnd vrly rrd rngc revc esi ese agnd natt n1
preliminary information MH88625 3 20 n1 network balance node 1 (input). 0.1 times the impedance between pins n1 and n2 must match the devices input impedance, while 0.1 times the impedance between pins n1 and agnd is the devices network balance impedance. this node is active only when ns is at logic high. this node may be terminated when not used (i.e., ns at logic low). 21 n2 network balance node 2 (output). see n1 for description. 22 z900 line impedance 900 ? node. connects to z1 for a line impedance of 900 ? . this node should be left open circuit when not used. 23 z1 line impedance node 1 (input) . 0.1 times the times the impedance between pins z1 and z2 is the devices line impedance. this node must always be connected. 24 z2 line impedance node 2 (output). 0.1 times the times the impedance between pins z1 and z2 is the devices line impedance. this node should be left open circuit when not used. 25 tx transmit (output) . 4-wire (agnd) referenced audio output. 26 rx receive (input) . 4-wire (agnd) referenced audio input. 27 gtxo transmit gain node 0 . connects to gtx1 for 0db transmit gain. 28 gtx1 transmit gain node 1 . connects to a resistor to agnd for transmit gain adjustment. 29 grxo receive gain node 0. connects to grx1 for 0db gain. 30 grx1 receive gain node 1. connects to a resistor to agnd to receive gain adjustment. 31 ic internal connection. this pin is internally connected and must be left open. 32 z600 line impedance 600 ? node (output). connects to z1 for a line impedance of 600 ? . this pin should be left open circuit when not used. 33 ns network balance setting (input. the logic level at ns selects the network balance impedance. a logic 0 enables an internal balance equivalent to the input impedance (zin). while a logic 1 enables an external balance 0.1 times the impedance between pins n1 and agnd balanced to 0.1 times the impedance between pins n1 and n2. the impedance between n1 and n2 must be equivalent to 10 times the input impedance (zin). 34 shk off-hook indication (output). a logic low output indicates when the subscriber equipment has gone off-hook. 35 ud unbalance detect (output). a log ic low output indicates when the dc current ?w in the tip and ring leads is unbalanced, indicating that the subscriber equipment has grounded the ring lead. 36,37 38 ic internal connection. these pins are internally connected and must be left open 39 v ee negative supply voltage. -5v dc. 40 v dd positive supply voltage. +5v dc. pin description (continued) pin # name description
MH88625 preliminary information 4 functional description the slic uses a transformerless electronic 2-wire to 4-wire conversion which can be connected to a codec to interface the 2 wire subscriber loops to a time division multiplexed (tdm) pulse code modulated (pcm) digital switching network. for analog applications, the tx and rx of the 2-4 wire converter can be connected directly to an analog crosspoint switch such as the mt8816. powering of the line is provided through precision battery feed resistors. the MH88625 also contains control, signalling and status circuitry which combines to provide a complete functional solution which simpli?s the manufacture of line cards. this circuitry is illustrated in the functional block diagram in figure 1. the MH88625 is designed to be pin compatible with zarlinks mh88632 and mh88628. this allows a common pcb design with common gain, input impedance and network balance. approvals fcc part 68, ccitt, doc cs-03, ul 1950, iec950, can/csa 22.2 no.225-m90 and ansi/eia/tia-464- a are system level safety standards and performance requirements. as a component of a system, the MH88625 is designed to comply with the applicable requirements of these speci?ations battery feed the loop current for the subscriber equipment is sourced through a pair of matched 200 ? resistors connected to the tip and ring. the two wire loop is biased such that the ring lead is 2v above vbat (typically -46v) and the tip lead is 2v below lpgd (typically -2v) during constant voltage, constant current mode. the slic is designed for a nominal battery voltage of -48vdc and can provide the maximum loop current of 45ma under the condition. the MH88625 is designed to operate down to a minimum of 16ma dc, with a battery voltage of -44v. the tip and ring output drivers can operate within 2v of vbat and lgnd rails. this permits a maximum loop range of 2300 ? loop current setting the MH88625 slic provides a constant current with constant voltage fallback. this design feature provides for long loop capability regardless of the constant current setting. refer to graph 1. the lca (loop current adjust) pin is an input to an internal resistor divider network which generates a bias voltage. the loop current is proportional to this voltage. the loop current can be set between 20 and 45ma by various connections to the lca pin as illustrated in graph 2 and figure 8. the loop current during a fault condition will be limited to a safe level. primary over-current protection is inherent in the current limiting feature of the 200 ? battery feed resistors. refer to graph 1. receive and transmit audio path the audio signal of the 2-wire side is sensed differentially across the external 200 ? feed resistors and is passed on to a second differential ampli?r stage in the 2w/4w conversion block. this block sets the transmit gain on the 4-wire side and cancels signals originating from the receive input before outputting the signal. programmable transmit and receive gain transmit gain (tip-ring to tx) and receive gain (rx to tip-ring) are programmed by connecting external resistors (rrx and rrt) from grxi to agnd and from gtx1 to agnd as indicated in figure 3 and tables 1 and 2. the programmable gain range is from -12db to +6db; this wide range will accommodate almost any loss plan. alternatively, the default receive gain of 0db and transmit gain of 0db can be obtained by connecting grx0 to grx1 and gtx0 to gtx1. in addition, a receive gain of +6db and transmit gain of +6db can be obtained by not connecting resistors rrx and rtx. for correct gain programming, the MH88625s tip-ring impedance (zin) must match the line termination impedance. for optimum performance, resistor rrx should be physically located as close as possible to the grx1 input pin, and resistor rtx should be physically located as close as possible to the gtx1 input pin.
preliminary information MH88625 5 graph 1 - iloop/rloop characteristics graph 2 - loop current setting figure 3 - gain programming with external components constant current region 1k ? 2k ? 70 60 50 40 30 20 10 0 constant voltage region rloop ( ? ) iloop (ma) 50 40 30 20 10k 100k 1m lca 28.48m = 0v iloop/ma 65ma (w/10) (w/10 + 10ma) to +5v to -5v 35.3ma o/c lca r(lca) w MH88625 z z 10k ? 10k ? z 10k ? 10k ? grxo grx1 gtxo gtx1 rx rrx rtx tx 25 28 27 26 30 29 + - + - z transmit gain : (tip-ring to tx) av= -20log (0.5+5k ? ) r tx rtx = 5k ? 10 (-av/20) -0.5 example rtx = 38k ? ; av = +4db receive gain : (rx to tip-ring) av= -20log (0.5+5k ? ) rrx rrx = 5k ? 10 (-av/20) -0.5 example rrx = 4.6k ? ; av = -4db
MH88625 preliminary information 6 two wire port termination impedance the ac termination impedance of 600 or 900 ? , of the 2w port, is set using active feedback paths to give the desired relationship between the line voltage and the line current. the loop current is sensed differentially across the two feed resistors and converted to a single ended signal. this signal is fed back to the tip/ring driver circuitry such that impedance in the feedback path gets re?cted to the two wire port. the MH88625s tip-ring impedance (zin) can be set to 600 ? , 900 ? or to a user selectable value. thus, zin can be set to any international requirement. the connection to z1 determines the input impedance. with z1 connected to z600, the line impedance is set to 600 ? . with z1 connected to z900, the line impedance is set to 900 ? . a user de?ed impedance can be selected which is 0.1 times the impedance between z1 and z2. for example, with 2200 ? in series with 11.5nf in parallel with 8200 ? , all between z1 and z2, the devices line impedance will be 220 ? in series with 115nf in parallel with 820 ? . see table 3 and figures 4 and 5. network balance transhybrid loss is maximized when the line termination impedance and slic network balance are matched. the MH88625s network balance impedance set can be set to zin, at&t (350 ? + 1k ? //210nf) or to a user selectable value. thus, the network balance impedance can be set to any international requirement, a logic level control input ns selects the balance mode. with ns at logic low, an internal network balance impedance is matched to the line impedance (zin). with ns at logic high, a user de?ed network balance impedance is selected which is 0.1 times the impedance between n1 and agnd. for example, with 2200 ? in series with 11.5nf in parallel with 8200 ? , all between n1 and agnd, and ns at logic high, the devices network balance impedance is 220 ? in series with 115nf in parallel with 820 ? ; the impedance between n1 and n2 must be equivalent to 10 times the input impedance (zin). in addition, with ns at logic high, an at&t network balance impedance can be selected by connecting natt to n1; in this case, no additional network is required between n1 and n2. see table 4 and figure 6. 12/16khz meter pulse the MH88625 provides control of an external signal path to the driver. a 12/16khz continuous signal can be applied to the esi pin. control of the ese input allows the metering signal to be transmitted to the line. unbalanced detection the unbalanced detect (ud ) pin goes low when the dc current through the two battery feed resistors is unbalanced eg., when the average dc current into the ring lead exceeds the current ?w out of the tip lead (indicating that the ring lead has been grounded). when the slic is interfaced to ground start subscriber equipment during the idle state, the ud output is monitored for indication of the subscribers ring ground signal. the maximum loop current supplied by the feed circuitry under this condition is limited. longitudinal balance the longitudinal balance speci?s the degree of common mode rejection in the 2 to 4 wire direction. precision laser trimming of internal resistors in the hybrid ensures good overall longitudinal balance. the interface circuitry can operate in the presence of induced longitudinal currents of up to 40ma at 60hz. off-hook and dial pulse detection the shk pin goes low when the dc-loop current exceeds a speci?d level. the threshold level is internally set by the bias voltage of the switch-hook detect circuitry. dial pulse can be detected by monitoring the interruption rate at the shk pin. these dial pulseswould be debounced by the systems software. ring trip detection the interface permits detection of an off-hook condition during the ringing. if the subscriber set goes off-hook when the ringing signal has been applied, the dc loop current ?w will be detected within approximately 100msecs and the shk output will go low. the ring relay is automatically disabled by the internal hardware.
preliminary information MH88625 7 figure 4 - input impedance (zin) settings with zin equal to 600 or 900 ? figure 5 - input impedance (zin) settings with zin not equal to 600 to 900 ? 24 23 22 32 24 23 22 32 nc nc nc nc MH88625 MH88625 z900 z600 z900 z600 z1 z2 z1 z2 input impedance (zin) set to 600 ? input impedance (zin) set to 900 ? note : make connection between z1 and other points as short as possible 24 23 22 32 MH88625 z900 z600 z1 z2 notes : 1) the 10xzin network must be set to 10 x the desired input impedance (zin). 2) the network balance must be set to the desired network balance. see section on network balance. 3) make connection between z1 and component as short as possible. zin = 0.1 x (rs + 1) 1/rp + s x cp where s = j x w and w = 2 x x f example : if rs = 2200 ? , rp = 8200 ? , cp= 11.5nf then the input impedance (zin) is 220 ? in series with 820 ? in parallel with 115nf. 10 x zin rp z1 z2 cp rs
MH88625 preliminary information 8 figure 6 - network balance setting with netbal equal to zin or at&t figure 7 - network balance setting with netbal not equal to znetbal or at&t figure 8 - loop current setting (see graph 2) 21 20 19 33 21 20 19 33 vdd MH88625 MH88625 natt ns natt ns n1 n2 n1 n2 network balance is set to the input network balance is set to the at&t compromise note : make connection between z1 and other points as short as possible impedance (zin) network (350 ? + 1000 ? // 210nf) impedance. the input impedance must be set to 600w. 21 20 19 33 MH88625 natt ns n1 n2 notes: 1) the 10xzin network must be set to 10 x the desired input impedance (zin) . 2) the network balance must be set to the desired network balance. see section on network balance. 3) make connection between z1 and component as short as possible. example : if rs = 2200 ? , rp = 8200 ? , cp= 11.5nf then the input impedance (znetbal) is 220 ? in series with 820 ? in parallel with 115nf. vdd rp n2 n1 cp rs 10 x zin 10 x netbal znetbal = 0.1 x (rs + 1) 1/rp + s x cp where s = j x w and w = 2 x x f +5v lca lca lca lca 8a 8b 8c 8d r -5v r MH88625 MH88625 MH88625 MH88625
preliminary information MH88625 9 table 1 - transmit gain programming note 1: see figures 3 and 4 for additional details. note 2: overall gain refers to the receive path of pcm to 2-wire, and transmit path of 2-wire to pcm. table 2 - receive gain programming note 1: see figures 3 and 4 for additional details. note 2: overall gain refers to the receive path of pcm to 2-wire, and transmit path of 2-wire to pcm. table 3 - input impedance settings note 1: na indicates high impedance (10k ? ) connection to this pin does not effect the resulting network balance. note 2: see figure 4 & 5 for applications circuits table 4 - network balance settings note 1: na indicates high impedance (10k ? ) connection to this pin does not effect the resulting network balance. note 2:low indicates logic low. note 3: see figures 6 and 7 for application circuit. transmit gain (db) rtx resistor value ( ? ) notes +6.0 no resistor +4.0 38.3k results in 0db overall gain when used with zarlink a-law codec (i.e. mt8965) +3.7 32.4k results in 0db overall gain when used with zarlink -law codec (i.e. mt8964) 0.0 gtx0 to gtx1 -3.0 5.49k -6.0 3.32k -12.0 1.43k receive gain (db) rrx resistor value ( ? ) notes +6.0 no resistor 0.0 grx0 to grx1 -3.0 5.49k -3.7 4.87k results in 0db overall gain when used with zarlink a-law codec (i.e. mt8965) -4.0 4.64k results in 0db overall gain when used with zarlink -law codec (i.e. mt8964) -6.0 3.32k -12.0 1.43k z2 z1 z600 z900 resulting input impedance (zin) na connect z1 to z600 na 600 ? na connect z1 to z900 na connect z1 to z900 900 ? connect network from z1 to z2 na na 0.1 x impedance between z1 & z2 ns (input) n2 n1 natt resulting input impedance (zin) low na na na equivalent to zin high na connect n1 to natt at&t compromise (350 ? + 1k ? // 210nf) zin must be 600 ? high connect network from n1 to agnd equivalent to 10 x netbal. connect network from n1 to n2 equivalent to 10 x zin. na 0.1 x impedance between n1 & n2
MH88625 preliminary information 10 dtmf dtmf tones may be transmitted and received at the 4-wire port. did operation for did operation, the tip and ring reversal is controlled by the revc pin. a logic level one causes tip and ring to be reversed. this can be controlled by a zarlink codec (mt896x) system drive output. (refer to figure 9b) high voltage capability inherent in the thick-?m process is the ability of the substrate to handle high voltage. the standard zarlink thick-?m process provides dielectric strengths of greater than 1000vac or 1500vdc. the thick-?m process allows easy integration of surface mount components such as the high voltage bi-polar power transistor line drivers. this allows for simplier, less elaborate and less expensive protection circuitry required to handle high voltage transients and fault conditions caused by lightning, induced voltages and power line crossings. on-hook transmission the MH88625 provides for on-hook transmission which supports features such as automatic numbers identi?ation (ani). the ani information is a fsk signal originating from and sent by the c.o. during the off period of the ringing voltage being sent to the subscribers set decodes the fsk signal and displays the calling partys number. loop length the MH88625 can accommodate loop length of up to 2300 ? minimum (including the subscriber equipment). this corresponds to approximately 8km using 26awg twisted pair or 15km using 24awg twisted pair. ops operation as shown in the application diagram, figure 9a, the ringing voltage, typically 90vrms 20hz biased at v bat , is applied to the subscriber line through an external relay k1. enabling of the relay is performed by applying a logic low level to the relay driver control input, rgndc. figure 9c, shows how balanced ringing can be accommodated if required. central of?e operation the MH88625 can be con?ured for ground start c.o. applications with the addition of q1, d1 and k2, as shown in figure 9c. ground start requires control of the tip lead to remove battery ground from subscriber loop. for loop start applications, control of the tip lead is not required. c.os perform tip/ring reversals to indicate that a toll call has been dialled. the tip/ring reversal can indicate a toll diversion signal.
preliminary information MH88625 11 figure 9a - ops slic con?uration applications circuit - normal ringing -5v +5v v dd v ee agnd rx grxo grx1 lca tx gtxo gtx1 shk ud z1 z600 rngc revc vrl y rrd coded tf1 tf2 tip ring rf1 rf2 ns rgnd -vbat 90vrms 20hz line controller logic +5v vr vx k1 k1 system ground v bat -vbat MH88625 lgnd ~
MH88625 preliminary information 12 figure 9b - did slic con?uration applications circuit logic logic -5v +5v v dd v ee agnd rx grxo grx1 lca tx gtxo gtx1 shk ud z1 z600 rngc revc vrl y rrd tf1 tf2 tip ring rf1 rf2 ns vr vx system ground v bat -vbat MH88625 rgnd +5v line controller logic logic lgnd = earth = ground
preliminary information MH88625 13 figure 9c - ls/gs c.o. slic applications circuit - balanced ringing -5v +5v v dd v ee agnd rx grxo grx1 lca tx gtxo gtx1 shk ud z1 z600 rngc revc vrly rrd codec tf2 tf1 tip ring rf1 rf2 ns -vbat line controller logic +5v vr vx k1 system ground v bat -vbat MH88625 rgnd ese esi 12/16khz metering source d1 +5v k2 q1 45vrms 20hz 45vrms 20hz k1b k1a k2 lgnd ~ ~
MH88625 preliminary information 14 figure 9d - suggested protection circuit MH88625 r1 f1 t line r f2 r2 t r pro1 suggested components: f1, f2 1a, 250vac, slo-blow littlefuse 230 2ag r1, r2, 10 ? , 1000v, 1/2w resistor (flame rated) pro1 solid state transient suppressor, eg tisp2300l, p2703ab f1, r1 and f2, r2 may be fusible resistors or ptcs
preliminary information MH88625 15 absolute maximum ratings * exceeding these values may cause permanent damage. functional operation under these conditions is not implied. recommended operating conditions * typical ?ures are at 25 c with nominal + 5v supplies for design aid only. dc electrical characteristics dc electrical characteristics are over recommended operating conditions unless otherwise stated. * typical ?ures are at 25 c with nominal + 5v supplies and are for design aid only. parameter sym min max units comments 1 supply voltage v bat v dd -v ee +0.3 -0.3 +0.3 65 6 6 v v v with respect lgnd 2 storage temperature t s -40 +125 c parameter sym min typ* max units comments 1 supply voltage v bat v dd v ee -44 4.75 -4.75 -48 +5.0 -5.0 -60 5.25 -5.25 v v v 2 operating temperature t op 20070 c characteristics sym min typ* max units test conditions 1 operating loop current var in loop current from nominal i loop i loop 16 45 ma ma r loop =0 ? 2300 ? vbat =-48v i loop 26 30 34 ma r loop =0 ? , lca -gnd 2 operating currents i bat i bat i dd i ee 32 2 25 25 ma ma ma ma r loop =0 (off hook), lca=gnd r loop = open (on- hook) on-hook or off-hook on-hook or off-hook 3 power dissipation pd o pd 1 2 300 w mw active standby/idle 4 shk ud low level output voltage high level output v ol v oh 3.7 0.5 v v i ol = 400 a i oh = 40 a 5 ese ns low level input voltage high level input voltage v il v ih 2.4 0.8 v v 6 ese ns high level input current low level input current i ih i il 20 20 a a v ih =5.0v v il =0.0v
MH88625 preliminary information 16 ac electrical characteristics * typical ?ure are at 25 c with nominal + 5v supplies and are for design aid only. ac electrical characteristics are over recommended operating conditions unless otherwise stated. notes: impedance set by external network of 600 ? or 900 ? default. external network for test purposes consists of 2200 ? + 8200 ? // 11.5nf between pins z1 and z2, the equivalent zin has 1/10 th the impedance and is equivalent o 220 ? +820 ? // 115nf test condition uses a zin value of 600 ? , 900 ? and the above external network. test conditions use a transmit and receive gain set to 0db default and a zin value of 600 ? unless otherwise stated. "ref" indicates reference impedance which is equivalent to the termination impedance. "net" indicates network balance impedance refer to table 1, 2 for tx, rx gain adjustment. characteristics sym min typ* max units test conditions 1 tx gain 0 db e xternally adjustable 2 rx gain 0 db e xternally adjustable 3 ringing capability 5 ren 4 on-hook transmission signal input level gain 6 2.0 v rms db vbat=-48v t-r load = 10k ? min. 5 external signal output level 1.75 2.25 v rms vbat= -48v, t-r load= 200 ? lca=0v, zo-600 ? , gain=0db 6 shk rise time fall time t r t f 1 1 ms ms dial pulse detection 7 2-wire termination impedance 600/ 900 ? selectable or user de?ed 8 off-hook detect threshold 10 ma 9 2-wire return loss 20 20 20 db db db 300 to 500hz 500 to 2500hz 2500 to 3400hz 10 longitudinal balance longitundinal to metallic metallic to longitudinal 58 53 db db 200-1000hz 3400hz 11 longitudinal current capability 40 ma 20ma per lead 12 idle channel noise rx to t-r t-r to tx n cr n cx 8 12 dbrnc dbrnc 13 transhybrid loss thl 22 40 db 200-3400hz 14 unbalanced detect threshold i ub 10 ma 15 analog signal overload level at tip and ring 4 dbm t-r=600 ? , vbat=-48v 16 ringing signal voltage 90 vrms 17 ringing frequency 17 68 hz 18 ring trip delay 100 ms 19 absolute gain, variation + 0.1 db 0db at t-r, 1khz, z o = 600 ? 20 relative gain, reference to 1khz + 0.0 5 db 300-3400hz z o = 600 ? 21 power supply rejection ratio v bat v dd v ee psr r24 24 24 db 1khz, 100mvpp
preliminary information MH88625 17 figure 10 - mechanical data 4.20 + 0.020 (50.8 + 0.5) 0.58 + 0.02 (14.7 + 0.5) 0.12 max (3.1 max) 0.010 + 0.002 (0.25 + 0.05) 0.080 max (2.0 max) side view 1) not to scale 2) dimensions in inches * 0.05 + 0.01 (1.3 + 0.5) * * * 0.05 + 0.02 (1.3 + 0.05) 0.020 + 0.05 (0.51 + 0.13) 0.100 + 0.10 (2.54 + 0.13) 0.18 + 0.02 (4.6 + 0.5) notes & tolerance non accumulative. * dimensions to pin center 3) (dimensions in millimetres) 40 2 1
MH88625 preliminary information 18
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